>or MakefilesHere's one I stole from cmus (who stole it from Linux).
ifeq ($(verbose),y)
quiet =
else
quiet = quiet_
endif
cmd = @$(if $($(quiet)cmd_$(1)),echo ' $(call $(quiet)cmd_$(1),$(2))' &&) $(call cmd_$(1),$(2))
quiet_cmd_cc = CC $@
cmd_cc = $(CC) -c $(CPPFLAGS) $(CFLAGS) -o $@ $<
quiet_cmd_ld = LD $@
cmd_ld = $(LD) $(LDFLAGS) -o $@ $^ $(1)
%.o: %.c
$(call cmd,cc)
foobar: foo.o bar.o
$(call cmd,ld,-lm)
This produces prettier output (unless you set verbose=y on the command line):
CC foo.o
CC bar.o
LD foobar
This is what I use to automatically generate prerequisites ($(objects) is a list of .o files):
dependencies = $(addprefix ., $(addsuffix .d, $(basename $(objects))))
quiet_cmd_dep = DEP $@
cmd_dep = echo "$@ `$(CC) $(CFLAGS) -MM $(CPPFLAGS) $<`" > $@
.%.d: %.c
$(call cmd,dep)
ifneq ($(dependencies),)
-include $(dependencies)
endif
All of this goes in lib.mk, which is included by the makefile after defining $(objects), etc.